Application of the hottest analog audio chip in se

2022-08-10
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The application of analog audio chip in the secondary communication of data acquisition process

this paper uses the interface circuit of TLC320AD50C and TMS320C30 to complete the data acquisition and the reading and writing process of TLC320AD50C register. The interface circuit between TMS320C30 and TLC320AD50C is shown in Figure 1

the main pins connected to the chip are reset signal reset; Synchronization signal: FS on ad50c, FSD (delayed frame signal), tms320c1, host maintenance: FSX on 30 (frame transmission signal), FSR (frame reception signal); Data reading and writing signals: DIN, dout, DX, Dr; Clock signal: SCLK, MCLK, clkx; Secondary communication request: FC on ad50c, XF on C30. Under the action of clock signal, the timing diagram of C30 frame signal (FSX, FSR) and data transmission (DR, DX) is shown in Figure 2. The off chip reset circuit provides power on reset, and the crystal oscillator circuit can provide a master clock frequency of more than 10MHz, from which the data sampling frequency and other clock signals are allocated. There are two communication formats between C30 and ad50c, namely, primary serial communication format and secondary serial communication format. The former is used to receive and send conversion signals, while the latter carries out secondary communication only when there is a request. In the main serial communication format, there are two data transmission modes: 16 bits and 15+1 bits, which can be set through the control register, except for 15+1 bits. Using 15+1 bit transfer mode, because China's extruder products are closely connected with strategic new industries, the lowest d0 is non data bit, the D0 bit of input DAC data is secondary communication request bit, and the D0 bit of output ADC data is the status bit of m/s pin

the secondary communication can only be generated when the request is sent, which will promote the harmonious development and dislocation development of the new material industry. When the first communication adopts the 15+1-bit mode, the secondary communication request can be made with d0. When the first communication adopts the 16 bit mode, the secondary communication request must be generated by the FC pin input signal. The format of secondary communication data is shown in Figure 2, where D7 ~ d0 are control register data, D12 ~ D8 are control register addresses, d13=1 are read control register data, and d13=0 write data to control register. Through secondary communication, TLC320AD50C initialization and modification of TLC320AD50C internal control register can be realized. 3、 The data acquisition circuit and the FSD of the master ad50c are connected to the FS end of the slave chip, but also meet the standard communication software implementation, as shown in Figure 3

the specific communication process is as follows: the ad50c data input and output are connected with the C30 data receiving pin. The frame rate signal sent by the ad50c is synchronized with C30 through the FS pin. The FSD is a synchronous delay signal, which is mainly used to expand the master-slave devices. The m/s on the ad50c can control the master-slave mode of the ad50c. The clock and synchronization signal pins in C30 can be set as external inputs by software, so that data transmission/reception, frame synchronization, clock signals are generated by ad50c, master clock (MCLK) signals are provided by crystal oscillator, and FC and XF terminals are used as secondary communication requests. Assuming that the data transmission format is 16 bits, FC sends secondary communication requests at high level

The flow chart of the program is shown in Figure 4

IV. conclusion

this paper introduces two typical chip connections, which well realizes the data reading and writing of registers in the process of data collection, and has also been well applied in practice

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